Logic Synthesis of RTL | Synopsys Design Compiler | Synopsys DC | dc_shell | DC Tutorial
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YouTubeTeam VLSI
Logic Synthesis of RTL | Synopsys Design Compiler | Synopsys DC | dc_shell | DC Tutorial
This is the session-5 of RTL-to-GDSII flow series of video tutorial. In this session, we have demonstrated the synthesis flow of Synopsys Design compiler in the command line. We have started from the RTL code which has been checked for functionality and using the technology library and design constraints we have synthesized the RTL code into ...
41.8K viewsOct 28, 2018
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